(Graphic compliments of www.Elpida.com)
As you can see from the graphic above, the connections are all internal and very difficult to access except through internal “test” interfaces which scream for DFT and BIST. What about the TSV connections themselves; should they be tested? At first glance, we said “no way”, 1) they won’t have ESD protection and 2) we might break them or worse, 3) cause a later field failure from damage by the probe. Plus the 20 um TSV will shrink to 5 um and there could be thousands or even more than a million of them in the near future.
This all begs the question, “but what will it cost”? What will the yield be? It appeared and still appears as though this TSV process MUST be “near perfect” to be cost effective. If it is not, will consumers be willing to pay more for the performance? What are the power and thermal implications of turning on all these layers for test and pulling all the heat out of the middle of the stack at the same time?
There is a single graphic from Roger’s public presentation about the cost of 3D test at the link at the end.
Also at the meetings, many were also a buzz about the new Xilinx “3D” or is it 2.5D package (uses an interposer and substrate) which combines 4 – 7-series FPGA’s. They are fabricated on a 28 nm process.
The interposer serves as a redistribution layer between the 4 FPGA’s and the substrate which then routes some of them to the BGA solder balls for attach to the PCB. All these interfaces won’t help much to remove the heat, so a new interface with direct connections to the 4 die will be required. Mention was made by the Assembly & Packaging TWG of “heat pipe” architecture to help remove the heat.
In comparison to the memory stack above, this will certainly consume considerably more power, kind of like how more cylinders and hemi engines have produced in the past.
So, in conclusion, this new paradigm will bring plenty of new challenges for the test community.
For more information and to keep up with the roadmap, check out the ITRS website at www.itrs.net